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AT26DF161
12.4
AC Characteristics
Symbol
Parameter
Min
Max
Units
f SCK
f RDLF
t SCKH
t SCKL
Serial Clock (SCK) Frequency
SCK Frequency for Read Array (Low Frequency – 03h opcode)
SCK High Time
SCK Low Time
6.8
6.8
66
33
MHz
MHz
ns
ns
t SCKR
(1)
SCK Rise Time, Peak-to-Peak (Slew Rate)
0.1
V/ns
t SCKF (1)
t CSH
t CSLS
t CSLH
t CSHS
t CSHH
t DS
t DH
t DIS (1)
t V
t OH
t WPS (1)(2)
SCK Fall Time, Peak-to-Peak (Slew Rate)
Chip Select High Time
Chip Select Low Setup Time (relative to SCK)
Chip Select Low Hold Time (relative to SCK)
Chip Select High Setup Time (relative to SCK)
Chip Select High Hold Time (relative to SCK)
Data In Setup Time
Data In Hold Time
Output Disable Time
Output Valid Time
Output Hold Time
Write Protect Setup Time
0.1
50
5
5
5
5
2
3
0
20
6
6
V/ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t WPH
(1)(2)
Write Protect Hold Time
100
ns
t SECP (1)
t SECUP (1)
t EDPD (1)
t RDPD (1)
Sector Protect Time (from Chip Select High)
Sector Unprotect Time (from Chip Select High)
Chip Select High to Deep Power-Down
Chip Select High to Standby Mode
20
20
3
3
ns
ns
μs
μs
Notes:
12.5
1. Not 100% tested (value guaranteed by design and characterization).
2. Only applicable as a constraint for the Write Status Register command when SPRL = 1.
Program and Erase Characteristics
Symbol
t PP
Parameter
Page Program Time (256 Bytes)
Min
Typ
1.5
Max
5.0
Units
ms
4-Kbyte
0.05
0.2
t BLKE
Block Erase Time
32-Kbyte
0.35
0.6
sec
64-Kbyte
0.7
1.0
t CHPE (1)
Chip Erase Time
18
28
sec
t WRSR
(1)
Write Status Register Time
200
ns
Notes:
1. Not 100% tested (value guaranteed by design and characterization).
27
3599H–DFLASH–8/09
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